The invention generally relates to circuits for monitoring and, as necessary, resetting the operation of computer apparatus, and, more particularly, to a simple microprocessor watchdog circuit for providing a reset signal in response to deviations from normal of the microprocessor status pulse train.
Watchdog timers are commonly used in association with microprocessor apparatus to monitor program execution as indicated by a status pulse train. If predetermined characteristics of the status pulse train deviate from normal, indicating improper program execution, a reset signal is provided. Watchdog timers are normally combined with other dedicated circuits to insure that when a proper operating voltage is first applied, the reset signal is provided during a power up period, and is thereafter removed for normal program execution.
A large number of techniques and circuits have been devised for performing the watchdog function. One known circuit shown in U.S. Pat. No. 5,081,625 includes an astable multivibrator circuit which provides a "low" signal to a RESET port when the multivibrator is in its first state. When power is first applied to the circuit, the miltivibrator is in its first state, and remains in that state for a predetermined initial time period sufficient to permit stabilization of microprocessor operation. Following the initial time period, the multivibrator circuit switches to a second state, thereby providing a "high" or non-reset signal to the microprocessor. An AC coupling and rectifier circuit receives a status pulse train from the microprocessor, and causes the multivibrator to remain in its second state as long as a status pulse train is present. In the event microprocessor failure results in termination of the status pulse train for a predetermined failure mode time period, the multivibrator circuit switches to its first state and provides a low or reset signal.
The above-described watchdog circuit is of simple, low cost design and provides for detection of microprocessor failures which result in discontinuance of the status pulse train. However, in certain instances, a microprocessor may fail in a mode which causes a marked increase in the status pulse train repetition rate, with attendant deviations in other characteristics of the status pulse train. Obviously, it is preferable that a watchdog circuit be capable of detecting as many failure modes of the microprocessor as possible.
Various watchdog circuit designs employing comparators for supplying signals to microprocessor reset ports are also known. One example for a microprocessor requiring a "high" signal for reset, and having a passive status output port is described on pages 78 and 79 of the November 1979 issue of "Digital Design". In that circuit design, the inverting input terminal of the comparator is impressed with a voltage developed across a capacitor in response to electric current from a supply circuit, feedback through a resistor from the comparator output terminal, and a pulse train responsive circuit connected to the status output port. As shown, the supply circuit includes a Zener diode connected in series with the capacitor between an unregulated voltage source and ground, and a relatively low resistance resistor connected across the capacitor.
In such a circuit, the voltage across the capacitor will vary with variations in the voltage from the unregulated source, which apparently will result in variations of the comparator switching point. Also, the current through the resistor connected across the capacitor and the power dissipated thereby apparently will become undesirably large with any significant increase in the voltage from the unregulated source.
The applicant has avoided the foregoing disadvantages by providing a simple, low cost watchdog circuit which is sensitive to both increases and decreases of the status pulse train repetition rate from its normal value, and whose operation is unaffected by normal variations in an unregulated supply voltage.